Courses offered in the FIB

• Introducció als Computadors (9).
  Coordinator: Fermín Sánchez.
  Keywords: Logic Circuits, Digital Systems, Logic Gates, Combinational Logic, Sequential Logic, Processor Logic Design.

• Estructura de Computadors I (7.5).
  Coordinator: Jordi Tubella.
  Keywords: Machine Level Programming, Input / Output Subsystem, Virtual Memory Management.

• Estructura de Computadors II (4.5).
  Coordinator: Josep Llosa.
  Keywords: Computer Organization, Processor Design, Cache Memories, Evaluation and Design of the Machine Language Level.

• Introducció als Sistemes Operatius (6).
  Coordinator: Enric Morancho.
  Keywords: User-view, System-calls, Virtual Memory, Input / Output, Processes, Concurrency.

• Sistemes Operatius (6).
  Coordinator: Luis Doreste.
  Keywords: Processes, File Management, Input / Output, Memory Management.

• Conceptes Bàsics de Xarxes de Computadors (4.5).
  Coordinator: Jordi Domingo-Pascual.
  Keywords: Data Communications, Protocols, Computer Networks, LAN, WAN, MAN, Internetworking, OSI Reference Model.

• Xarxes de Computadors (6).
  Coordinator: Jordi Iñigo.
  Keywords: Data Communications, Protocols, Computer Networks, LAN, WAN, OSI Reference Model.

• Disseny Bàsic VLSI (6).
  Coordinator: Jordi Cortadella.
  Keywords: VLSI, Logic Design, Microelectronics, CMOS Technology, Design Tools.

• Arquitectura de Computadors (9).
  Coordinator: Enrique Herrada.
  Keywords: Computer Arithmetic, Pipelining, Processor Performance, Instruction Level Parallelism, Models of Pipelined Processor.

• Administració de Sistemes Operatius (6).
  Coordinator: Toni Cortés.
  Keywords: Operating Systems Management, UNIX, Local Networks, Security.

• Sistemes de Transmisió de Dades (4.5).
  Coordinator: Isabel Gallego.
  Keywords: Internet, OSI (Open Systems Interconnection), Network Service, Transport Service and Protocol, TCP/IP (Transport Control Protocol/ Internet Protocol), ASN.1 (Abstract Syntax Notation One), XDR (eXternal Data Representation), RPC (Remote Procedure Call).

• Disseny i Avaluació de Configuracions (6).
  Coordinator: Olga Casals.
  Keywords: Performance Analysis, Modeling Techniques, Measurement Techniques, Queueing Models.

• Síntesi Automàtica de Circuits (6).
  Coordinator: Jordi Cortadella.
  Keywords: Design Tools, CAD Tools, Placement, Routing, Logic Synthesis, High-Level Synthesis.

• Arquitectures Vectorials (6).
  Coordinator: Juan J. Navarro.
  Keywords: Vector Data Path, Multimodule Memories, Vector Performance, Dependence Analysis, Vectorizing Techniques, Dense and Sparse Matrix Operations, Vectorization of Recurrences.

• Estructura Interna d'un Sistema Operatiu (4.5).
  Coordinator: Sergi Girona.
  Keywords: Unix Internals and Unix Device Drivers.

• Sistemes Públics de Dades (6).
  Coordinator: Josep Solé-Pareta.
  Keywords: Data Transmission Devices, HDLC protocol, LAN, MAN, ISDN.

• Conceptes Avançats de Sistemes Operatius (6).
  Coordinator: Jordi Torres.
  Keywords: Distributed Systems, Distributed Operating Systems, Microkernels, Inter-process-communication, Distributed-file-system.

• Arquitectura d'Aplicacions Distribuïdes (6).
  Coordinator: Jaime Delgado.
  Keywords: OSI (Open Systems Interconnection), Internet, Application Layer, Electronic mail, Multimedia documents architecture and protocols, File transfer protocols, Real time protocols, Security in distributed applications.

• Disseny de Sistemes Operatius (6).
  Coordinator: José I. Navarro.
  Keywords: Microkernels, Scheduling, Memory Management, Remote Procedure Calls.

• Multiprocessadors (6).
  Coordinator: José M. Llabería.
  Keywords: Shared Memory Multiprocessors, Distributed Memory Multiprocessors, Performance Evaluation, Interconnection Networks, Synchronization, Cache Coherence, Parallel Programming Techniques, Parallelization.

• Avaluació i Sintonització de Sistemes Operatius (4.5).
  Coordinator: Jesús Labarta.
  Keywords: Performance Evaluation, Tuning, OS Modelization, Benchmarking.

• Supercomputadors (6).
  Coordinator: Antonio González.
  Keywords: Parallel processor microarchitecture, Software scheduling, Dynamic scheduled processors, Prefetching, Programming models, Compiling techniques, Parallelization.