The goal of this program is to introduce students to research topics related to the theory, practice, analysis and design of Computer Systems. In particular the main topics of the program are: Computer Architecture, Supercomputers, VLSI Design, Parallelism, Operating Systems, Distributed Systems, and Communication Networks.
Coordinator: Jordi Cortadella
A brief summary of the different courses given by the Department during the academic course 1996/1997, is listed below. Following the name of each course, the number in brackets indicates credits (1 credit equals 10 hours of lectures).
Parallel Algorithms (3).
Coordinator: Juan J. Navarro.
The objective is to study small and coarse grained parallel algorithms for linear algebra operations (matrix multiplication, linear system of equations by direct and iterative methods and the computation of eigenvalues of a symmetric matrix). The emphasis is on the adaptation of the algorithms to the underlying architecture. The architectures under consideration are those based on superscalar and vector processors and multiprocessor systems (shared and distributed memory). Modelization and performance evaluations are also considered.
Document architectures and protocols (3).
Coordinator: Jaime Delgado.
These course deals with the more advanced aspects of document architectures and protocols, based on existing and under development standards for representation, interchange and manipulation and remote handling of documents. Furthermore, focus is made on the international standarization process. The topics include, after an introduction about distributed applications and electronic mail: ODA (Open Document Architecture), Remote manipulation of documents, DFR (Document Filing and Retrieval), Document communication services, Conferencing services and protocols, Multimedia and hypermedia documents, and, in parallel with the other topics, the standarization process.
Architectures oriented to symbolic computing (3).
Coordinator: Antonio González.
This course studies execution models and architectures oriented to provide an efficient support to declarative languages, especially logic and functional languages. The WAM and SECD abstract machines are described and their sequential implementation is analyzed. Finally, different sources of parallelism and the main issues for its exploitation in a multiprocessor environment are are studied.
Broadband Communications (3).
Coordinator: Jordi Domingo-Pascual and Josep Solé-Pareta.
The information technology environment is in quick evolution. A bunch of new applications are emerging, some of them involving high performance computation and high transfer rates. New technologies are also being considered. This has an important impact on the communication networks. High speed and service integration are the current major demands. This course focuses on both, broadband networks and service integration. The Asynchronous Transfer Mode (ATM) is the technology that is envisaged to support the Broadband ISDN. The course offers an in-depth presentation of all the technical issues related with ATM networks: the Protocol Reference Model for the B-ISDN defined by the ITU-T, and the UNI 3.1 interface defined by the ATM Forum. It also presents the most recent developments in this fast moving field: ATM traffic Management aspects, ATM signaling, the Private Network Node Interface and the general aspects for ATM Network Management.
Distributed Systems Design (3).
Coordinator: Leandro Navarro.
This Course presents the topics related to distributed computing, from the basic paradigms of distribution: time, fault tolerance, group communication, remote procedure call, channel based communication. Several areas of application are discussed: Internet (routing, protocol architecture, applications), distributed file systems, environments for the development of distributed applications, computer supported cooperative work systems.
Traffic management in ATM networks (3).
Coordinator: Olga Casals.
This course describes the characteristics of the traffic control and congestion control procedures for ATM technology. In order to fully exploit the advantages of ATM, efficient, effective and easy-to-implement functions which control the traffic streams are needed. We discuss the following functions witch form a framework for managing and controlling traffic and congestion in ATM networks and which may be used in appropriate combinations: Connection Admission Control (CAC), Feedback controls, Usage Parameter Control (UPC), Priority Control, Traffic Shaping, Network Resource Management (NRM), Frame Discard, ABR Flow Control.
Memory Hierarchy in Scalar Processors (3).
Coordinator: Angel Olivé.
The goal is to show techniques to alleviate the memory bottleneck problem, due to the gap between processor cycle time and memory access time. The techniques revised in this course are related to the concept of memory hierarchy. Methods addressed in the course deal with the latency reduction and how to get efficiency in the presence of this memory latency. Organization of memory to increase the bandwidth is also studied.Hardware solutions to assure information coherence in the different memory levels, are also considered.
Programming Models and Tools for Supercomputers (3).
Coordinator: Eduard Ayguadé.
In this course we present different programming models for parallel computing (shared and distributed memory, data parallel), as well as tools for parallel program analysis and performance prediction. Finally the course also focuses on tools for the automatic loop parallelization and data distribution from the analysis of sequential code.
Parallelism and Segmentation in the Design of General-Purpose Processors (3).
Coordinator: José M. Llabería.
The objetive of this course is to show the application of the pipelining and parallel techniques to the design and implementation of scalar processors. Techniques to reduce the cycle losses, in the processor and in the interaction processor-memory hierarchy, are analysed. An updated overview of commercial processors is presented.
Automatic Synthesis of Circuits (3).
Coordinator: Rosa M. Badia.
In this course existent techniques for layout synthesis and high level synthesis are mainly studied. In the area of layout synthesis, the existent approaches to perform the different phases of this level of design are described: partitioning, placement, routing and compaction. With respect to high level synthesis, the different phases that compose it and the different approaches to resolve them are described. This phases are: operation scheduling and resource binding (hardware allocation). Also, an overview of the existent hardware description languages is done, giving special emphasis to VHDL.
Logic synthesis and verification of digital circuits (3).
Coordinator: Jordi Cortadella.
In the area of logic synthesis, techniques for two-level and multilevel synthesis are reviewed. Methods for logic minimization, reduction of delay and technology mapping are presented. Next, techniques for the synthesis of sequential circuits are studied: state minimization, state encoding and FSM partitioning. In the area of formal verification, several techniques for combinational and sequential circuits will be reviewed: Binary Decision Diagrams, reachability analysis, symbolic model checking, temporal logic, etc. Finally, the course covers some basic techniques for the synthesis and formal verification of asynchronous circuits.
Supercomputers (3).
Coordinator: Mateo Valero.
This course focuses on the study of the architecture of high-performance computers. Since the architecture of such computers evolves very dynamically, the contents of the course will evolve at the same pace to reflect the latest trend in the design of high-performance computers. Currently the course covers three types of architectures: Vector machines, Instruction-Level Parallel processors and Multiprocessors.
Parallelization of numerical applications in Engineering (3).
Coordinator: José M. Cela.
This course is focused in the parallelization techniques for the numerical simulations for PDEs and Markov Chains. Sparse linear systems are the numerical kernel of these applications. We describe the iterative solvers used for such systems (Domain Decomposition solvers, Krylov subspace solvers and Multigrid solvers). Emphasis is put in the parallelization approach based in message passing programming model. PVM is used as communication library for practical examples.
Broadband, integrated services and Multimedia Applications (2).
Coordinator: Jordi Domingo-Pascual.
Real-time multimedia applications impose several strict requirements to the communication network services in order to obtain the desired Quality of Service (QoS). The Broadband Integrated Services Network (B-ISDN) using the ATM technology is expected to provide this QoS guarantee for distributed multimedia applications. This course reviews the main characteristics of multimedia communications and the demands they impose to the communication network services and describes the basic communication services for real-time multimedia distributed applications.
Broadband, integrated services and Multimedia Technologies (2).
Coordinator: Josep Solé-Pareta.
Broadband Communications, Integrated Services and Multimedia Applications are the main key words to identify the currently Computer Networks evolution. Network-based multimedia applications are becoming the norm rather than the exception, the traditional separation between Local and Wide area networks is disappearing with the introduction of ATM and the Personal Communication Systems concept will definitively link Mobile Communications with Computer Networks. This course focuses on the technological and architecture issues, which are making possible these changes.
On the Computer Architecture Departament Ph.D. Program some seminars are given. This seminars are given for worldwide experts in specific topics related to Architecture and Technology of Computers. Seminars given in the academic course 1996/1997 are:
Distributed Shared Memory: Concepts and Systems (1).
Veljko Milutinovic (University of Belgrad)
In this seminar, concepts and algorithms for Distributed Memory Multiprocessors, but shared at the programming level, are introduced. This is the architecture of the last commercial platforms. This seminar is based on the book edited by IEEE "Distributed Shared Memory: Concepts and Systems".
Current and Future High-performance Processors (1).
James E. Smith\ (University of Wiscosin-Madison)
This seminar describes the current high performance scalar architectures. The current and future trends on microprocessor design are also presented.
High-level Languages, Compilers and Tools for Parallel Scientific (1).
Hans Zima (University of Vienna)
Available programming tools and parallel oriented data programming languages are presented in this seminar. Programming languages as Vienna Fortran and High Performance Fortran (HPF), based on the "Data-Parallel Single-Program Multiple-Data (SPMD)" model, have been introduced to program parallel scalable architectures in an abstract way. Their main features and constrains are analyzed.
